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Persistor CF1 User's Manual
Multiple Parallel I/O
July 1998		Revision 1.01
Persistor Instruments Inc.		© 1998 All rights reserved.

Multi Chip 3.3V/5V Tolerant 32 Line I/O Expansion

Hardware: 

Sometimes eight I/O lines just wont cut it. For those who need more, this example provides a framework to add up to 32 inputs and 32 outputs to your CF1, but with much added complexity. This example uses 9 ICs. Although we have mentioned this in the Parallel I/O overview, this example makes it very important to revisit the issue of bus capacitance, wait states and recharacterization of your CF1. We cannot stress this enough. This schematic will probably not work as is. Please do yourself a favor and reread the section on bus capacitance. Furthermore, we encourage you to gain a healthy understanding of each of the simpler parallel I/O expansion application notes we have supplied before even attempting to decipher this one.

This circuit makes use of one four 74LPT245's functioning as 32 digital inputs, four 74LPT574's to provide 32 digital outputs and one 74XXX139 to work as an address decoder. The XXX in the 74XXX139 is meant to imply that you may use address decoders from more than one family. We have been specific with the other chips to make sure that your actual I/O lines are 5V tolerant, but the decoder need not be. It must however support 3.3V levels. The circuit diagram follows with a brief explanation below:

 

Since we are now dealing with more than one byte of address space, as well as allowing both input and output at the same location, the need for an address decoder has arisen. This address decoder uses the Read/Write signal and the A1 signal as well as the chip select to determine which chips should be enabled for each read or write operation. The 74XXX139 is a dual 2-to-4 decoder with enable. There are actually two distinct decoders in it. In the diagram above, the lines for each are preceded by a 1 or a 2 to indicate which half they belong to. Below is a truth table for one half of the dual decoder(X means "don't care"):

The 74LPT245s are tristate buffers that operate here as inputs. They let the input signals onto the bus when their outputs are enabled. The 245 is actually a bidirectional tristate buffer but we have hardwired its direction line to only allow it to transfer one way. The reason this chip was used here was its ready availability. The 74LPT574s are octal D Flip-flop latches that load the contents of the bus into the latch on the rising edge of their enable. Their output tristates are always enabled in this example by tying their Output Enable lines to ground.

Application Level Interface

First and foremost you must tell the CF1 where it can find this newly added peripheral. Now bear in mind that unlike the earlier more simple examples, now we have both inputs and outputs. Although they are separate inputs and outputs (as opposed to configurable I/O's) they are accessed through the same address in memory, the address decoder makes a determination on the fly about which chips to want to interact with by the read or write nature of the transaction. We need to set up this behavior and we have written a function called IO32ExpandInit () to do just this:

// Multiple Chip 32 Line I/O Expansion Functions
void IO32ExpandInit(void)
{
	CS8Setup(0x00100000, 0x00000004, false);
	CS8Options(true, true, false, 0);
}

Next in line are functions that allow you to "bit bang" individual lines on your new I/O. These functions each take an I/O number which corresponds to which data line you with to set, clear or read. This number should be between 0 and 31.

void IO32ExpandPClr(ushort whichLine)
{
	ulong mask;
	mask = ( (ulong)0xFFFFFFFF << (ulong)(whichLine + 1) ) | ( (ulong)0xFFFFFFFF >> (ulong)(32 - whichLine) );
	*((vushort *)0x00100000) &= mask;
}

void IO32ExpandPSet(ushort whichLine)
{
	ulong mask;
	mask = (ulong)0x00000001 << whichLine;
	*((vushort *)0x00100000) |= mask;
}

bool IO32ExpandRead(ushort whichLine)
{
	ulong mask = 0x00000000L;
	mask = ((ulong)0x00000001 << whichLine ) & *((vushort *)0x00100000);
	return (mask > 0 ? true : false);	
}

Lastly are functions that allow you to read and write to the I/O lines using whole 32 bit unsigned longs.

// Long Reads/Writes

void IO32ExpandWriteULong(ulong longToWrite)
{
	*((vushort *)0x00100000) = longToWrite;
}

ulong IO32ExpandReadULong(void)
{
	return *((vushort *)0x00100000;
}

This should put you well on your way to understanding how to add, and interact with additional, memory-mapped, parallel I/O lines.

Back to Parallel I/O Expansion Application Note

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Copyright (C) 1998 Persistor Instruments Inc. - All Rights Reserved