Real Time Clock

The 68338 has an onboard Real Time Clock (RTC) Submodule which is clocked by a separate 32768 Hz crystal and powered by VDD and VSS pins separate from the chips main supply. Power for the RTC normally comes from the main supply, but will automatically switch to the off-board backup battery when necessary.

The RTC crystal is a basic CX1V tuning fork crystal with an initial accuracy of ±50ppm in a Pierce oscillator circuit with the parabolic temperature versus frequency curve typical of these types of crystals as shown.

Your programs interact with the RTC through a combination of low level drivers which are basically wrappers for accessing the hardware, standard C library functions like clock() and time(), and through a suite of high level functions that provide countdown timers, elapsed timers, synchronization timers, and precision delays. You can synchronize the RTC to an external start signal and you can add up to eight chores that execute once each second.

Persistor CF1 Year 2000 Compliance

The hardware implementation of the RTC consists of a 16-bit prescaler that divides the crystal by 32768 to clock a 32-bit seconds counter giving it a range of 136 years with a resolution of 30.5 microseconds. The CPU has direct read and write access to both the prescaler and seconds registers and there is no "years" register, so this RTC is inherently Y2K compliant.

All of the BIOS and PicoDOS software and firmware for the CF1 has been developed during the period of great awareness for year 2000 problems and coded to guard against the bugs that plague older systems.

The Metrowerks CodeWarrior compiler and the Metrowerks Standard C Libraries used for CF1 development are also free from Y2K defects when used with compliant hardware such as the CF1.

PLL System Clock

The 68338 system clock is supplied by a phase-locked loop (PLL) clock synthesizer driven by a 40kHz tuning fork crystal with an initial accuracy of ±100ppm. The PLL synthesizer can generate system clock frequencies from 160kHz to many times over the rated maximum operating frequency of 16MHz in steps of 160kHz up to 10MHz and steps of 320kHz to 20MHz, and 640kHz steps above that.

Since the operating power varies linearly with clock speed, you can use this feature to dynamically tailor power consumption to match the computational requirements of your instrument design. The 68338 also has several LPSTOP modes that let you direct the clock to only the currently active submodules, and you can even turn the PLL synthesizer off completely to drop the CF1 power down to 250µA.

Periodic Interrupt Timer

The Periodic Interrupt Timer (PIT) is driven directly from the 40kHz system clock crystal and prescaled either by four to provide a 10kHz timebase, of by 2048 for a 19.53Hz timebase. The PIT uses an 8-bit modulus counter which gives an interrupt rate of from 100µs to 25.5ms with 100µs steps using the fast prescale option, or 51.2ms to 13s with 51.2ms steps using the larger prescale.

The CF1 BIOS lets you define up to eight chores to execute at each PIT interrupt. Chores are normal C functions which hide the interrupt mechanics, but they're expected to be short routines that simply initiate actions or modify flags for the foreground process. PIT chores are an excellent way to schedule A-D readings and the MAX146 example project shows how this is used for both low-power acquisition by sleeping between readings, and high-speed acquisition to collect at aggregate rates of up to 80ksps.

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